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Given the relative cost and extreme lack of prevalence of the EPROMS and Kickstart ROMs, a modern solution must be found.


The basic design will employ a small CPLD which will act as a bridge between a larger quantity of flash and the address/data lines of the traditional ROM. It will provide "windows" into chunks of the Flash memory in a way that is 100% transparent to the CPU. Since modern CPLDs and Flash are orders of magnitude faster than the ~120nS ROMs used in the original Amigas, access/load speed should be significantly faster.

The Pinout for the 40/42-pin DIP KickStart socket can be found at


_Note_ It may be possible to use some special Page-mode capable flash, such as the F640BFHEPTTL70A from Sharp. 64Megabits in a 48TSOP format cost $13 at and would forego the need for a CPLD entirely.

Spansion makes the S29AL016D which is available in 90 and 70ns varieties, 3.3v, 16bit parallel. Would need to use in tandem with a level shifter such as the Texas Instruments SN74ALVC164245DGGR which is a 48-pin TSSOP 3.3v to 5v level shifter, which costs $1.35

DigiKey also sells TSOP to DIP adapters, which cost about $12 each but must be purchased in quantities of 15 or more ($175/ea) These adapters are made by Aries Electronics out of New Jersey, who manufactures a great selection of adapter products

Must convert 5V to 3.3V as all modern flash and CPLDs are 3.3v

Use of an Atmel CPLD from the ATF15xx Family with at approx ~40 user I/O pins. Atmel Flash memory (either 32Mbit or 16Mbit) from the AT49BVxxxx-70TU family will be used. 32Mbit cost is under $3, and 16Mbit cost is under $2 USD. There's also a 64mbit which runs less than $6

The ATF1502AS-10JU44 is a PLCC44 chip which might just do the job, but the pin count is likely too low. It's $3.50 each from DigiKey.

-- STMicro M29W400BB90N6 IC FLASH MEM 4MBIT 3V 48-TSOP - $3.38/ea

Transcript of chat from #Coreboot

(8:18:26 PM) The topic for #coreboot is: | coreboot at GSoC '08: (8:59:20 PM) CareBear\: what's the question anyway?
(9:00:52 PM) MrBIOS: CareBear\:
(9:01:56 PM) MrBIOS: and finally
(9:03:28 PM) MrBIOS: the question is, can I use that Sharp flash in a way which would not require me to interface it with a CPLD. It seems to be the only flash chip on the market that supports Page Mode
(9:11:59 PM) mydrmeix [] entered the room.
(9:21:29 PM) CareBear\: the MX is dirt simple
(9:21:50 PM) MrBIOS: right, not as dirt simple as anything else on the market these days
(9:22:00 PM) CareBear\: if it's used in 8-bit mode you can replace it with any popular ISA flash chip
(9:22:06 PM) CareBear\: eg SST39SF040 (PLCC or SSOP) will work perfectly
(9:22:40 PM) CareBear\: it's not pin compatible, but it's electrically and logically compatible
(9:23:02 PM) CareBear\: again - only if the MX was used in 8-bit mode
(9:23:12 PM) CareBear\: if not, you can combine two flash chips
(9:23:17 PM) CareBear\: 39SF020
(9:23:39 PM) CareBear\: that's why I was asking about the external bus
(9:23:41 PM) MrBIOS: well there are actually two of these 256KByte guys 
(9:23:43 PM) CareBear\: much simpler with 8 bit
(9:23:54 PM) MrBIOS: I think they're wired together in series 
(9:24:07 PM) CareBear\: so start by mapping the connection between the two
(9:33:11 PM) MrBIOS: CareBear\:  appears to be that most traces run straight to identical pins on both DIP sockets
(9:44:32 PM) MrBIOS: see
(9:46:07 PM) CareBear\: so it's either in 16-bit mode or 32-bit mode
(9:46:34 PM) MrBIOS: right, depending on the CPU
(9:46:46 PM) CareBear\: and what's your target?
(9:47:00 PM) MrBIOS: 16 or 32? ultimately, both
(9:47:07 PM) CareBear\: immediate target
(9:47:10 PM) CareBear\: which machine
(9:47:30 PM) MrBIOS: 16, for starters
(9:47:34 PM) CareBear\: which machine
(9:47:50 PM) MrBIOS: actually the EC020 is 24-bit AFAIR
(9:50:03 PM) MrBIOS: A1200 = 68EC020 soldered to board
(9:50:12 PM) CareBear\: so you have a 1200?
(9:50:24 PM) MrBIOS: it's a 32-bit CPU with a 24 bit address bus (the EC020)
(9:50:40 PM) MrBIOS: no, as I said, my initial target is the 68000, which is 16 bit
(9:50:47 PM) CareBear\: in which machine?
(9:50:51 PM) MrBIOS: A500
(9:51:07 PM) CareBear\: rev 5, 6 or 7?
(9:52:37 PM) MrBIOS: 6A
(9:52:46 PM) CareBear\: cool
(9:53:01 PM) CareBear\: you'll need two chips
(9:53:03 PM) MrBIOS: the A500 only has one DIP socket
(9:53:17 PM) MrBIOS: the A3000/A1200 has two
(9:53:25 PM) CareBear\: you'll still need two chips, if you want to use the ones that are commonly used for PCs
(9:53:49 PM) CareBear\: so on the 16-bit machines the data bus is 16 bit
(9:53:53 PM) CareBear\: on the 32-bit machines it's 32
(9:54:02 PM) CareBear\: that's why there are two sockets on those machines
(9:54:31 PM) CareBear\: because you need 16 bits of data you can't just use a single SST39SF040
(9:54:53 PM) CareBear\: if you want to use some kind of chip that is commonly used in PCs you have to use two 39SF020s
(9:56:09 PM) CareBear\: 
(9:56:23 PM) CareBear\: (which is appealing because they are easier to get)
(9:56:35 PM) CareBear\: there _are_ plenty of 16-bit flash chips that will fit the bill
(9:56:48 PM) CareBear\: but they're not as easy to get, and not as easy to reprogram
(9:56:54 PM) MrBIOS: now ultimately, I'd prefer to use something with a lot more storage capacity
(9:57:04 PM) CareBear\: you can't get more than 4Mbit
(9:57:14 PM) CareBear\: (well 8Mbit actually)
(9:57:18 PM) CareBear\: there are only 19 address lines
(9:58:14 PM) CareBear\: though I don't see A0 anywhere in this table
(9:58:34 PM) MrBIOS: its there
(9:58:47 PM) MrBIOS: 2...9 Input A7...A0
(9:58:50 PM) MrBIOS: do a string search
(9:59:20 PM) CareBear\: that's on the chip
(9:59:36 PM) MrBIOS: it maps to A8-A1 on the board
(9:59:45 PM) CareBear\: it's not listed as a CPU signal
(9:59:55 PM) CareBear\: right
(9:59:58 PM) CareBear\: where is A0 on the board
(10:01:22 PM) CareBear\: I guess not used because all accesses are at even byte addresses
(10:01:39 PM) CareBear\: so, total memory space is 8Mbit
(10:01:52 PM) CareBear\: you'll need two 39SF040 chips, and no other components. just wiring
(10:02:57 PM) MrBIOS: or two 020's if 4Mbit is sufficient, yes?
(10:03:04 PM) CareBear\: right, but you might as well wire up the last address line (A18) if making an adapter :)
(10:03:44 PM) CareBear\: the table suggests that A500 6A uses 8Mbit of data
(10:05:22 PM) CareBear\: connect all address lines in parallell to both flash chips
(10:05:43 PM) CareBear\: connect D0..D7 of one chip to D0..D7 in the Amiga, connect D0..D7 of the other chip to D8..D15 in the Amiga
(10:06:47 PM) CareBear\: connect OE# and CE# of both chips to /OE and /CS, respectively, in the Amiga
(10:07:11 PM) CareBear\: the common 39SF040 is 45ns
(10:07:20 PM) CareBear\: so faster than the old RAM in the amiga
(10:08:01 PM) CareBear\: because the bus master will still wait for the slower memory
(10:08:20 PM) CareBear\: it can't know you've replaced it with RAM from another millennium
(10:08:21 PM) MrBIOS: right, wonder if there's any benefit to using 70ns in this case due to wait state syncing
(10:09:17 PM) CareBear\: of course connect VCC and GND across chips and socket too
(10:09:20 PM) CareBear\: then you're done
(10:09:32 PM) CareBear\: when programming the two chips, each chip has every other byte of data
(10:10:23 PM) CareBear\: the d0..d7 chip gets byte 0 at chip address 0, d8..d15 gets byte 1 at address 0, d0..d7 chip gets byte 2 at address 1, d8..d15 gets byte 3 at address 1, and so on
(10:11:15 PM) CareBear\: then for 32-bit systems
(10:11:16 PM) CareBear\: you just repeat
(10:11:20 PM) CareBear\: add two more flash chips
(10:11:24 PM) CareBear\: d16..d23
(10:11:27 PM) CareBear\: d24..d31
(10:11:35 PM) CareBear\: but all address lines across
(10:11:48 PM) CareBear\: then each flash chip gets every 4th byte
(10:12:15 PM) CareBear\: d0..d7 gets byte 0, d8..d15 byte 1, d16..d23 byte 2, d24..d31 byte 3, d0..d7 byte 4 and so on
(10:12:20 PM) CareBear\: your wiring
(10:13:32 PM) CareBear\: when reading all chips are read at the same time
(10:13:40 PM) CareBear\: each chip gives 8 bits
(10:13:48 PM) CareBear\: 16-bit systems need data from two chips at once
(10:13:52 PM) CareBear\: 32-bit systems need data from four
(10:14:16 PM) CareBear\: (since this is a big endian machine, my byte order may actually be swapped.)
(10:14:25 PM) CareBear\: (if it doesn't work like I say just swap the chips around)
(10:15:55 PM) CareBear\: for 16-bit that means: d8..d15 address 0 has byte 0, d0..d7 address 0 has byte 1, d8..d15 address 1 has byte 2 and so on
(10:16:32 PM) CareBear\: for 32-bit: d24..d31 address 0 has byte 0, d16..d23 address 0 has byte 1, d8..d15 address 0 has byte 2, d0..d7 address 0 has byte 3, d24..d31 address 1 has byte 4 and so on
(10:17:04 PM) CareBear\: that can all be fixed up in software though, by just swapping data around
(10:18:18 PM) MrBIOS: looking at $3*4 plus cost of PCB and PLCC sockets, etc
(10:18:58 PM) CareBear\: 39SF040 should be $2 or even $1
(10:19:02 PM) CareBear\: but maybe you have to buy 30 of them
(10:19:45 PM) MrBIOS: only mouser seems to have them in the states
(10:20:03 PM) CareBear\: avnet?
(10:20:05 PM) CareBear\: arrow?
(10:20:06 PM) CareBear\: future?
(10:20:08 PM) MrBIOS:
(10:20:33 PM) CareBear\: other 5V parallel flash works too
(10:21:18 PM) CareBear\: you can get the 70ns at 2.00
(10:21:57 PM) CareBear\: was looking at the W package. I'd go with NHE which is PLCC
(10:21:59 PM) CareBear\: smaller footprint
(10:22:04 PM) CareBear\: easier to make a nifty adapter PCB
(10:22:56 PM) CareBear\: 2.00:
(10:24:54 PM) MrBIOS: might be easier to fit it all if I used TSOP
(10:25:24 PM) CareBear\: not so big difference
(10:25:30 PM) CareBear\: and much less convenient for reprogramming
(10:25:52 PM) MrBIOS: I could program it with the DIP if I pre-arranged the bytes
(10:25:54 PM) MrBIOS: via the DIP
(10:26:18 PM) CareBear\: not really reliable because you're trying to program two chips at once
(10:26:41 PM) CareBear\: and you'd need a programmer that can deal with the 16-bit memory
(10:28:19 PM) CareBear\: easy to work with is the only motivation for the hack
(10:28:30 PM) CareBear\: if you don't care about that you should just use a 16-bit parallell flash chip
(10:28:58 PM) MrBIOS: why is that less easy to work with?
(10:28:59 PM) CareBear\: two 39SF040 are very easy to program compared to a 16-bit chip
(10:29:24 PM) CareBear\: the 16-bit chip needs a standalone programmer
(10:29:27 PM) MrBIOS: I have an external programmer, GQ-3X
(10:30:00 PM) CareBear\: maybe 16-bit chips are slightly less common ie less cheap
(10:30:27 PM) CareBear\: so look at the 16-bit chips it supports and see if one is suitable for the amiga
(10:32:59 PM) CareBear\: depends, if you want to make it easy for others to replicate your hack then it's nicer to not need a programmer of course :)
(10:34:15 PM) MrBIOS: know of any examples of 16 bit P/N's?
(10:37:20 PM) MrBIOS: and actually there are clearance issues since there's a keyboard a few centimeters above the DIP sockets
(10:37:21 PM) CareBear\: S29AL016D
(10:37:41 PM) CareBear\: that's a motivation for TSOP
(10:37:43 PM) CareBear\: they're thin
(10:37:54 PM) MrBIOS: that is in the device list for my programmer here
(10:38:29 PM) CareBear\:
(10:38:43 PM) CareBear\: it's too big, twice the size you need
(10:39:38 PM) CareBear\: Spansion has nothing useful
(10:39:42 PM) MrBIOS: well the 16mbit is appealing since you can bank-switch.
(10:39:50 PM) CareBear\: sure
(10:40:02 PM) MrBIOS: thats a common thing people install a kickstart riser for anyways.
(10:42:04 PM) CareBear\: no current products are 5V
(10:42:17 PM) CareBear\: meaning you either have to still use two old chips
(10:42:23 PM) CareBear\: or use level translation/shifters
(10:42:32 PM) CareBear\: I'd go with two old chips
(10:44:12 PM) MrBIOS: the spansion is only $3.80
(10:44:18 PM) MrBIOS: and frankly a lot more available
(10:44:38 PM) MrBIOS: Newark/Jameco/Farnell/Future
(10:45:00 PM) MrBIOS: actually as low as $2.35
(10:45:42 PM) CareBear\: hope that helped a bit :)
(10:45:45 PM) CareBear\: a few options
(10:45:47 PM) MrBIOS: definitely, thanks a lot
(10:47:41 PM) MrBIOS: CareBear\:  I'd need to level convert all 48 pins (more or less) yes?
(10:48:30 PM) CareBear\: yes, you may need to do power plane conversion too
(10:49:26 PM) CareBear\: and if you're using something simplistic like that I believe you need a regulator to make the 3V too
(10:58:56 PM) MrBIOS: ah now this is more like it, methinks - They're $1.35/ea
(10:58:59 PM) CareBear\: doing it with a x16 flash part is a great academic exercise in simple EE and procurement
(10:59:17 PM) CareBear\: I suggest using two flash parts instead, and being done
(10:59:30 PM) CareBear\: if you don't want to that's fine, but you get to do all the work yourself.
(11:00:31 PM) MrBIOS: well ultimately, I'm not looking for a 100% replacement for the current, I need to be able to toggle
(11:00:47 PM) MrBIOS: so in that case, this approach may make more sense
(11:01:18 PM) MrBIOS: cant fit eight PLCC or TSOP 4mbitters on one DIP board :)
(11:01:27 PM) CareBear\: sure you can
(11:01:47 PM) MrBIOS: five or six max
(11:01:47 PM) CareBear\: well maybe not eight
(11:01:50 PM) CareBear\: but four easily
(11:02:10 PM) CareBear\: you can put them across on top
(11:03:06 PM) CareBear\: the pin raster is 15.24 mm, between the two rows of pins
(11:03:28 PM) CareBear\: you get pins that don't mount through hole, but are SMT on the underside of the PCB
(11:03:40 PM) CareBear\: then you can fit 39SF040 TSOPs across on top
(11:03:48 PM) CareBear\: they're 8mm wide, each
(11:03:59 PM) CareBear\: with the amiga 40 pin socket, that's 101mm
(11:04:21 PM) CareBear\: you can easily have 10x 39SF040 on top
(11:04:34 PM) CareBear\: and still have 16mm+ left over on the end
(11:04:41 PM) CareBear\: plus you have all the bottom of the PCB
(11:04:49 PM) CareBear\: where you can put some five or six more
(11:04:59 PM) MrBIOS: makes it a bitch to program though, as you yourself said earlier
(11:05:32 PM) CareBear\: sure, you don't get to have the cake and eat it too
(11:07:12 PM) MrBIOS: what causes those flash chips to get read, when the CPU initially powers up)
(11:08:01 PM) CareBear\: the CPU fetches instructions at some address when it comes out of reset
(11:08:22 PM) CareBear\: that's called the reset vector
(11:17:33 PM) MrBIOS: I am somewhat concerned the 4mbit serial jobbers will just vanish in a few years as well
(11:17:44 PM) MrBIOS: rather use something I am much more confident will be around or replacable.
(11:20:41 PM) MrBIOS: anyways, those two chips and I'd be in business
(11:21:58 PM) MrBIOS: cheaper, easier PCB layout, still easy to program.
(11:22:13 PM) CareBear\: um no
(11:23:06 PM) MrBIOS:
(11:23:06 PM) CareBear\: not easy to program at all unless you include special circuitry for that
(11:23:10 PM) CareBear\: you need power conversion
(11:23:47 PM) MrBIOS: in all likelyhood I will do both
(11:23:53 PM) CareBear\: cool
(11:23:53 PM) MrBIOS: easy way first
(11:24:04 PM) CareBear\: let me know how it turns out
(11:25:09 PM) MrBIOS: why wouldn't it be easy to program? What do you envision as a roadblock?
(11:27:16 PM) CareBear\: you're putting one flash chip type into a different package
(11:27:21 PM) CareBear\: programmers can't deal with that
(11:27:38 PM) CareBear\: and bonus you're changing the signalling
(11:27:53 PM) CareBear\: forget it, if you can't take the chip out and program standalone you have to build your own programmer too